Or we can say, after resetting the PC holds its initial memory address.An 8085 microprocessor is an IC with 40 pins and operates with 5V power supply.So, now lets move further and understand how the processor operates inside any system with these 40 pins.So, let us proceed to understand the role of each pin inside the 8085 microprocessor.
This pin shows the grounded connection of the microprocessor. These 2 pins are connected with a crystal or LC network to maintain the internal frequency of the clock generator. However, out of 16, 8 are multiplexed with the data bus and the leftover 8 are separately shown by pin number 21 to 28 in the pin configuration. These are denoted by A 8 to A 15 that represents the 8 MSB of the memory location or input-output address. However, to reduce the number of bus lines these 8-bit data bus lines are multiplexed with the 8-bit address bus. The address bus is denoted by A whereas the data bus is denoted by D. The pin configuration denotes the lower order multiplexed address and data bus bits from AD 0 to AD 7. While the data bus contains the data or instruction that is needed to be fetched from the memory. With this pin, data is serially fed to the processor directly through the input devices. Once the data is processed in the microprocessor then this pin represents bit by bit results at the output devices. We know that 8 lower order bits of the 16-bit address bus are multiplexed with the 8-bit data bus. Otherwise, it gets disabled showing the absence of an address on the bus. Thereby indicating that the data bus is now in a state or position to accept the data from the memory or IO devices. This indicates that the data present in the data bus is to be written into the desired memory address or IO device by the processor. This shows whether the readwrite operation is to be carried out at the memory location or at the IO device. As against, a high signal at this pin represents the operation at IO device. These signals show the type of recent operation of the microprocessor. The table below represents the status of the data bus under different conditions. When an interrupt signal is generated then CPU immediately stops its recent task under operation and switches to some other program known as interrupt service routine (ISR). These are INTR, RST5.5, RST6.5, RST7.5 and are easily manageable interrupts. ![]()
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